 | | System design and architecting front-end |
| - Fully-timed functional (application) and physical (platform) models at the message abstraction level
- Capture models through graphics and simple C code for detailed sequential algorithms
- Define the system within its environment used as simulation input/testbench
- Automatic SystemC code generation
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| System-level verification environment |
| - Fast simulation (message-passing transactional SystemC-based - OCP TL3)
- Automatic instrumentation, rich set of visualization/analysis tools
- Observe the system’s behavior, communications and performance data
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| Rapid architecture exploration cycle |
| - Define as many hardware platforms as wished in minutes: mono or multiprocessor, mono or multi-board, with simple or complex interconnect
- Use generic hardware components with universal performance characteristics: no specific models or ISS required
- Map application elements to platform components by a simple drag-and-drop operation
- Execute “what-if” scenarios by trying out different platform and/or mappings without writing a single line of code
- Obtain time-accurate co-simulation results
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| Providing system executable specifications and common HW/SW reference |
| - Obtain in a project’s first 20% the right system architecture transactional SystemC model
- Used as specifications and testbench for further HW/SW design and implementation
- Used to specify and verify subcontracted implementation of subsystems - Build your company’s electronic system design knowledge repository with libraries of models
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